MyRIO FPGA Analog Input

[JingTY]

Hi Everyone,

I have a simple code to detect the voltage level at analog input 1 and compare it with a threshold value to trigger the LED using myRIO FPGA. 

However, the value obtained from analog input didn't seem right. When the input is 0V, the reading is about 5; when the input is 3.3V, the reading is about 2700; and when the input is 5V, the reading is about 4000.

It seems that the scale of reading is not correct. I am just wondering if there is any way to make the input signal reflect the real voltage level so I can easily choose the threshold value.

Thank you.

Jing

[JingTY]

Ahh, problem solved. I failed to consider 12 bits ADC in my program...

So the input voltage value needs to be divided by 2^12 to get the actual voltage level.

But i am still curious why this convertion problem only appears in fpga program rather than in the realtime program. Anyone can help?

Thank,

Jing 

[TuiTui]

Hi JingTY,

Don't if this will help

http://zone.ni.com/reference/en-XX/help/370984R-01/criodevicehelp/converting_and_calibrating_analog_...

Best regards,

TuiTui

[TuiTui]

Hi Jing,

More information as follow,

You can browse through the user guide and specification sheet.

http://www.ni.com/pdf/manuals/376047a.pdf

On page 10 of the manual, There is a sentence states that the returned value by FPGA I/O node is Raw data value.

There is more explanation on FPGA data type in this link below,

http://zone.ni.com/reference/en-XX/help/371599H-01/lvfpgaconcepts/decide_data_type/

Best regards,

TuiTui

[JingTY]

Hi TuiTui,

Thank you very much for your help. Now I understand the FPGA I/O Node always return Raw Data Value. 

By the way, may I check with you how to do division in FPGA? My labview program cannot compile division calculation. Is it correct?

Thanks.

Best regards,

Jing

[natasftw]

What kind of division are you doing?  If it's the special case where you're dividing by a power of 2, you can always use a bit-shift.

[JingTY]

Hi Natasftw,

Yes, I need to divide the raw data by 2^12 (12-bit ADC) and then multiply by 5 to get the actual voltage level. Could you be more specific on how to do bit-shift?

Thank you.

Best,

Jing 

[TuiTui]

Hi Jing,

Great to hear that the information help!!

You might want to look at this white paper. I hope this will help you understand more on why the divide function doesn't work well in FPGA

http://www.ni.com/white-paper/3661/en/

There also a forum post about dividing in below link,

http://forums.ni.com/t5/LabVIEW/Dividing-in-FPGA/td-p/189324

Best regards,

TuiTui

[JingTY]

Thank you!

[natasftw]

The thread TuiTui linked had a small example showing the bitshift.  Multiplying by 2^-12 is the same as dividing by 2^12.  In terms of understanding a bitshift, look at three binary numbers:  100 010 001.  If we start from the left, we see 4 2 1.  You can notice shifting the bit one spot divides by 2.  That's why bitshifting can be used in the very specific case where you're working with a power of 2.  It's a trick that's used rather frequently in DSP applications as the cycle cost for a bitshift is usually 1 while divides can be much more.  But, make sure you're careful with this.  If you bitshift by 12, you're only going to maintain your 4 MSBs in a 16-bit word.  The other 12 are all shifted to the right of the word and become 0s.