I finally took the online LabVIEW FPGA course and was able to create configuration and bit files to use the FPGA I/O of a myRIO with VeriStand.
I created a document that describes how those files were created. The FPGA configuration and bit files along the LabVIEW project are attached to that document. The link to the document is: forums.ni.com/t5/Example-Code/FPGA-Configuration-file-to-use-myRIO-with-VeriStand/ta-p/4131193
Marc Dubois
