The register level programming document for the pci-6602 does not specify details for the Gi interrupt acknowledge registers or for the Gi HW save registers or for the Gi autoincrement registers.
In addition, there is apparently no information about registers required to used the PFI 8 through 24 as DIO instead of counter / timer pins.
All in all, it appears that the document was developed without anyone actually proof reading it or in fact using the information to perform c/t and dio operations.
Too bad since it is obviously a board of high quality. If only NI would make it possible to use it in my vx works system.
