02-18-2011 12:17 PM
Hi!
I'm using DAQ-6602. While generating retriggered finite train (1 pulse) I have fot the following situation. First signal goes correctly: "High-time -> Low-time" but after re trigger it goes other way around: "Low-time -> High-time".
That's mean each signal after firs one has a delay == Low-time.
Any way to force it working right?
I'm using DAQ-6602, VB.NET
By the way, I found similar topic, but with the delay problem:
"Gen Digital Pulse Train Finite Retriggerable - Initial Delay is only for first trigger"
http://forums.ni.com/t5/Counter-Timer/Gen-Digital-Pulse-Train-Finite-Retriggerable-Initial-Delay-is/...
Thanks,
Denis
02-18-2011 01:40 PM
Hi Denis,
This seemingly unusual behavior is a result of the implementation of retriggerable counter outputs on earlier generations of DAQ hardware (M Series and prior).
On the first trigger, the "Iniital Delay" parameter is used to determine the amount of time to wait before outputting. On every subsequent trigger, "Low Time" is used. So, if you're just outputting a single pulse, then the Low Time is essentially irrelevant and you should set Low Time and Initial Delay to be equal. If you're outputting a finite pulse train (>1 pulse), the workaround involves configuring two separate counter tasks and is described in the above link.
For what it's worth, X Series devices may use the "Enable Initial Delay on Retrigger" property to give a much more intuitive behavior.
Best Regards,