Generating more than 4 tight trigger pulses with a PCIe-6321 (X series) DAQ card

[Novgorod]

I need to generate a repetitive cascade of short trigger pulses which go to 7 different hardware devices, each one connected to a different digital output (or PFI) pin on the PCIe-6321. Basically, a master trigger generates a clock signal with some period and duty cycle and each clock pulse is sent cyclically to the 7 output pins (i.e. first pulse to output 1, second pulse to output 2, ... 7th pulse to output 7, 8th pulse to output 1 and so on).

This can be conveniently done with the onboard counters for such a cascade of up to 4 devices, but if I need more than 4 trigger signals, I may have to use the digital outputs instead. The problem with that is that the sample clock for the digital output only goes up to 1MHz according to the spec, limiting the clock pulse width to >1µs, which is too long. The counters use the internal 100MHz clock and can create pulses with down to 20ns duration (2 clock cycles). Since I'm not outputting complex digital waveforms, digital output is probably not the best method for this anyway. Is there a way to maybe forward the master clock (using one counter) to 7 different PFI terminals but with some kind of modulo logic (+ offset) applied to it to let only every nth pulse through?

It's probably not too hard to implement this with some high-speed shift register or so (requiring only a single counter output from the card), but a solution without external circuits would be much preferable.

[Kevin_Price]

I tried to think up some kind of clever trick with just the X-series device, but no dice.  You're limited by the hardware, as you already suspected.  Counter tasks could accomplish your timing resolution, but you only have 4 outputs and need 7.  Digital outputs are limited to 1 MHz, affecting the timing resolution for both your pulse widths and the pulse start times.

Is it only the 1 usec pulse *widths* that trouble you about using DO?  Can you live with the 1 usec resolution for the interval timing between various pulse leading edges?   If so, I'd be looking for a simple external circuit thingy (I'm no wiz on what's available out there) that could turn a rising edge into a fixed-duration pulse with a width of your choosing (probably settable with resistor choice or similar).

   The possible advantage over external shift register circuitry is that you could retain programmatic control over the time between pulses instead of making it be fixed in hardware.

-Kevin P

[Novgorod]

Hmm, it's a good point to use some kind of latch (?) to convert an edge into a short pulse. The minimum 1µs period between pulses may be a problem but it's not certain yet what the final clock of the system will be (1MHz is in the ballpark but it might go up to few MHz where DO will be limiting). Still it might be a good backup plan.

By "programmatic control over the time between pulses" you mean changing the clock period at runtime? An external shift register circuit with the cyclic switching would be still clocked by the master trigger coming from the card (via a counter output), so it wouldn't be fixed in hardware. It's a bit of a trivial task for the card just to be simply used as an adjustable clock generator, but that's the life of a prototype :)... Later when optimum operation parameters are determined, it can be replaced by a simple fixed hardware clock.

[Kevin_Price]

Programmatic control was referring to the buffer of digital data.  I assumed you'd use the max sample clock rate of 1 MHz, but I figured that a "cascade" of trigger pulses to 7 different devices would mean that those pulses would (or at least *might*) be offset from one another.  So you could control the time intervals between the various pulses based on how you built up your DO data buffer.   That's the kind of programmatic control I meant.

I figured a hardware solution involving some # of external shift registers would tend to fix the intervals in hardware once you built up the circuit.  On the plus side, you might be able to achieve finer timing resolution that way.

-Kevin P

[Novgorod]

I see. Yes, the interval between each pulse would be programmatically controllable with DO in steps of 1µs (which is a bit coarse for our application), but it won't be necessary to make the 7 trigger pulses to the different devices non-equidistant in time. Only adjusting the master clock should be programmatic (at least during the development phase), so it won't be an issue to fix the "distribution" in hardware. Anyhow, the 1MHz should get us started while I'll be looking for a suitable external circuit with a shift register to do higher speeds.

[santo_13]

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@Novgorod wrote:

I see. Yes, the interval between each pulse would be programmatically controllable with DO in steps of 1µs (which is a bit coarse for our application), but it won't be necessary to make the 7 trigger pulses to the different devices non-equidistant in time. Only adjusting the master clock should be programmatic (at least during the development phase), so it won't be an issue to fix the "distribution" in hardware. Anyhow, the 1MHz should get us started while I'll be looking for a suitable external circuit with a shift register to do higher speeds.

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For external circuits, there are some COTS options to convert a edge into a pulse.

https://www.analog.com/media/en/technical-documentation/data-sheets/ds1040-ds1040-100.pdf

https://www.ti.com/logic-voltage-translation/specialty-logic-ics/monostable-multivibrators/overview....

[Novgorod]

Thanks! The DS1040 looks perfect to convert an edge into a nanosecond pulse.