11-06-2018 11:51 AM
I need to generate 4 Continuous Pulse Trains. Each pulse train needs to be 90 Deg out of phase from the previous (0 deg, 90 deg, 180 deg, 270 deg). I'm using a PXIe-6358 which has 4 counters. Each train has the same frequency, but I'm having difficulty with the phasing. Ideally, I would like to start and stop the pulse trains individually, but if I have to start them all at the same time, I can settle for that.....as long as the phasing is accurate and consistent.
Any help will be appreciated.
11-06-2018 12:41 PM
Much as I'm a fan of counters, I think I'd consider doing this with a DO task on port 0 (where hardware timed tasks are supported). With 4 pulses at 90 deg phase increments, you only have 4 unique digital states. You can generate a repeating pattern of these 4 states using a sample rate that's 4x the pulse rate you want.
In fact, I spent just a couple minutes to modify a shipping example to try to illustrate. It ran without error on a simulated X-series 6321 so I think it ought to work on real hardware too.
-Kevin P
11-08-2018 10:05 AM - edited 11-08-2018 10:13 AM
Followup note: the DO approach I posted will give you accurate and consistent frequency and phasing, but doesn't let you start and stop the pulse trains individually.
One way to approach individual control is to refill the task buffer with the corresponding pattern where 1 or more of the DO lines never pulses high. Be aware that there will be some latency between the time you write this new pattern and when the board actually wraps back around the buffer to start generating it. At most, this will be 1 buffer length worth of time.
The simplest way to reduce latency is to reduce the # of times you repeat the pattern in the buffer. The reason for repeating it at *all* is that the task buffer is held in PC system RAM. The DAQmx driver uses DMA to keep transferring data from the RAM buffer down to the board. This transfer process is more efficient when data can be transferred less frequently and in bigger chunks. But the size of a chunk will never (I'm pretty sure this is true) be greater than the size of the RAM buffer.
In general there's a tradeoff among latency, transfer efficiency, and transfer robustness (the ability to *always* do enough data transfer to keep up with the output sample rate). There are some advanced DAQmx properties that give you a vague and fuzzy degree of control over this tradeoff, but I'd first try the simpler approach of a smaller task buffer to reduce latency.
-Kevin P