How can I set the initial state of the PGCTR0 out pin?

[feng0001]

Hi,

I have a 6115 board, and I am trying to generate a pulse train on PGCTR0 with an external clock. The external clock signal is connected to PFI1 and the PGCTR0 is gated through PFI0. The PGCTR is reset at the end of each run.

The problem is that the initial state of the PGCTR out pin changes from run to run, but I'd like it to stay high after reset. Any help is appreciated. THanks.

feng

[rgharrison]

Hi Feng,

The default output state of your counters should be high depending on your board. If you run a counter application, and the line ends in a low state it will stay low. One way to change the output state is to not only reset the counter but reset the board (see knowledge base linked below). The other way is to treat it like a digital line (see second link below). This is probably the best method. This method should allow you to read the value and change it using a couple software calls. Instead of disabling the counter, I would reset the counter since you just want to reset the state. This method is also a decent workaround because you are resetting the counter anyway. Hope that helps. Have a good day.

Default State of Counter Output Lines
on E Series Data Acquisition Devices
http://digital.ni.com/public.nsf/websearch/008995633E33E47486256B5F00034436?OpenDocument

Using the General Purpose Counter (GPCTR) on the Data Acquisition (DAQ) Device as a Digital Line http://digital.ni.com/public.nsf/websearch/B8A49A4E33F38AB686256B610061DC6D?OpenDocument

Ron