How do I simultaneously start five counters (buffered event counting) with LabVIEW on a PCI-6602?

[aka47]

I am trying to use LabVIEW 6.1 to program a PCI-6602 board to do buffered event counting on four (eventually five) independent inputs.  This means I am using the internal time base as the source on all four counters, and have connected the four external signals to the gate lines for counters 0, 1, 2, and 3.  I can get all the counters to start and count all right and I can read back the buffers.  However, I am having trouble figuring out how to get all the counters to start simultaneously.  I tried to use the method used in the example "Triggered_multiple_counters.llb" from the NI website, which is to wire an external connection from DIO_0 to PFI_33 (counter 1's UP/DOWN line) and having the other counters trigger on that, but whenever I strobe DIO_0 to trigger the counters to start, counters 2 and 3 (which are part of the 32-bit DIO) quit working.

Do you have any suggestions?

[aka47]

Never mind.  I found a way to do what I needed to do.  Basically, I enable Start Trigger on all the counters I am using, call Route Signal.vi to set the Start Trigger to the OUT line of one of the counters I am not using, then call Generate Single Pulse (NI-TIO).vi (from the ni-tio.llb in the LabVIEW examples) to generate a pulse on that OUT line.  It seems to work well, and no extra external wiring required.

I don't know what I'd do if I were counting with all 8 counters, but fortunately I don't have to worry about that in my case.

[falkpl]

You can do this I have had seven counters running of the same triggers synchronously under LV 6.1 and a 6602 card. I am, assuming you are using traditional daq and not daqMx.  Configure the 5 counters to be in buffered event counting and set all of the each counter to have the same gate pin (pfi _38 for example), do not start the counters but arm them,this will put the counters in a state ready for a rising edge on the PFI line.  Now you can either start the synchronous collection with an external ttl pulse train on the gate pin or you can send one form an unused counter out (single pulse out).  I will take a look for my old code, I even used an additional counter to count source clocks to determine the incoming pulse train's timing since it as not standard.

Paul