Counter/Timer
Ni7842 FPGA RIO board loop rate
Hi,
Is it possible to achieve a loop rate of 1us with the Ni7842 RIO board. It has an onboard clock of 40MHz. I have tried the following approaches to achieve a 1us loop rate and generate a single pulse of 1us duration, but wasn't successful.
1st approach: The above flat sequence was originally with 2 frames, I removed the second processing frame to reduce any possible processing delays and changed counter units to usec with a count of 1. This did not work, minimum pulse width I could generate was 1ms.
2nd approach: I changed counter units to ticks with a count of 40. This also was able to generate a min pulse width of 1ms only.
The AO channel is capable of 1MS/s update rate and with an onboard clock of 40Mhz you would think you can achieve 1us. Why is it being so difficult for me? Please help.
Thanks,
PG
Show some actual code. If possible, supply a stripped down project that shows this issue. I recommend zipping up this project and any needed VIs and posting the zip file.
