12-03-2009 02:53 PM
The attached VI measures the frequency of a known 24,575,000 Hz signal. When measured with an Agilent 53181A-010 3GHz Frequency counter, this signal measures 24,575,999.4 Hz. When the same signal is measured with the PXI-6608 Counter, this signal measures 24,576,149.3 Hz. Both instruments are calibrated, and both measurements were made with an 8 sec gate.
Am I using the most accurate measurement technique? Could my PXI-6608 be defective or out of calibration, despite being brand new?
misc. info.:
The PXI-6608 is in slot 2 of a PXI-1033. I'm connecting to CTR1 via PFI-35, triggering on the rising edge, and have a 8 sec gate for sub-Hz resolution.
LabVIEW 2009, TestStand 4.2, MAX 4.6.1
Thanks in advance,
Sam Broyles
Solved! Go to Solution.
12-03-2009 11:10 PM
Correction: the known signal is 24,576,000 Hz. This signal is phase locked to a GPS signal, so we have a high confidence that it’s accurate.
The PXI-6608 has a frequencystability of 75 ppb. At 24,576,000 Hz this translates to +/- 1.843 Hz (plus anyerror induced by the measurement technique). According to the Agilent on-linecalculator, the measurement error of the Agilent53181A-010 at this frequency is 4.48574 Hz.
The test signal is a singleended, 3.3V square wave, so threshold is not a problem. However, it’s connectedthrough a terminal block so noise could be an issue.
I’ve attached a LabVIEW 8.5 version ofthe same VI.
Thanks!
Sam Broyles
12-04-2009 11:18 AM
Sam,
Did you see this KnowledgeBase article? Does it give you better accuracy if you manually route the clock to the appropriate PFI line? Also, how consistent is the measurement you are receiving from one run to the next?
-Christina
12-04-2009 01:39 PM
This is interesting. It sounds like there are a couple options:
Signal Integrity: 3.3V should be fine, but since the frequency is higher than we would expect it would mean you are getting extra counts. Are you connecting the test signal ground to one of the digital grounds on the 6608? I've seen this not connected and causing problems for developers. Christina's question about repeatability would point one way or another.
6608 timebase is off: If you've already got it in slot 2 you're running off of the OCXO... did you let it warm up for the specified warm up time? It sounds like you already have the Agilient frequency counter there, if you generate a 10MHz signal (or any other, they'll all be derived from the onboard clock) from the 6608, what does the agilent say?
Thanks,
Andrew S
12-04-2009 02:08 PM
I have the GND of the signal source connected to the DGND of the 6608.
This measurement has been consistent as the 6608 has warmed up (>4 hr).
Also, I routed the 20MHz and 80Mhz timebase clocks of the PXI-6608 through the terminal block to collect the data below.
1) Agilent VS 6608:
- 6608 measured 10MHz external reference from Agilent as 10,000,059.8Hz
- Agilent measured 20Mhz time base from 6608 as 19,999,880.6Hz
- Agilent measured 80MHz time base from 6608 as 79,999,522.4Hz
(time base was connected directly to PFI output)
2) 24.576 MHz Known reference:
- Agilent measured this clock as 24,575,999.2Hz
- 6608 measured this clock as 24,576,145.6Hz
Summary: The PXI-6608 OCXO should be calibrated to 10MHz +/- 0.1Hz, but it appears to be 60Hz low. Therefore, all measurements with the 6608 are 60Hz high for each 10MHz (linear).
12-04-2009 03:07 PM
Great troubleshooting - I agree with your summary. So I see two possibilities: Both cards sent to you have OCXOs running slow (seems unlikely), or the PXI chassis backplane isn't detecting the presence of the clock when in slot two and the chassis is providing its own clock anyway. When in slot 2, the 6608 exports its 10MHz clock, which is supposed to over ride the 10MHz backplane clock. The 6608 then imports the 10MHz backplane clock and phase locks to that. There's a good diagram in figure 2-7 in the manual. If the chassis either isn't detecting the clock or just not allowing the 6608 to over ride, this would explain what you are seeing. I don't have a 6608 handy, but if I recall right you can export /6608/MasterTimebase and this should be the 10MHz clock independent of phase locking. I'll confirm that when I get a chance.
Also, if you have another chassis handy you could try that.
Thanks,
Andrew
12-08-2009 05:39 PM
12-09-2009 08:19 AM
Sam,
Thanks for posting the solution on the forum. I just wanted to note that all of the 103X series chassis have this configuration that needs to be made on the backplane. The 1033 has a jumper that must be changed, but some of the others, 1036, have a small switch instead of a jumper. In all cases with the 103X series the jumper or switch is located in almost the exact same location as the image Sam posted.
NI PXI-103x Chassis Synchronization Troubleshoot
Accuracy Problems When Driving the PXI Backplane Clock with a PXI-6608
12-09-2009 09:36 AM