03-26-2013 04:28 AM - edited 03-26-2013 04:28 AM
Here is a hardware solution:
http://www.wb5rvz.com/sdr/ensemble_rx_ii_vhf/04_div.htm
just a 7474 logic ic
03-26-2013 12:53 PM
I would very slightly tweak the ideas that Travis referenced and linked to. The problem I see with making separate software calls to change the freq on your 2 counters is that the unknown & unpredictable software latency between those calls is likely to get your simulated quadrature out of phase, definitely getting away from 90 degree phasing and possibly looking like a direction reversal.
With the hw you have, I'd opt to use a 3rd counter pulsetrain as the timing source rather than a dummy AI task's sample clock. Then you can change the freq of the 3rd counter on-the-fly, and the simuluated quadrature will maintain proper phase relationship. (Note: you can also change the sample rate of an AO task on-the-fly, and could use a dummy AO task. An AI task can't have its sample rate changed on the fly if you use the default internal clock for sampling.)
-Kevin P