Hi,
I have a PCI 6602 counter-timer, which I am attempting to use to make a buffered two-edge separation measurement as follows.
Counter 0 is making the measurement, on the internal 80 MHz timebase. The gate is the output of counter 1, and AUX_LINE is being supplied externally.
This works fine, except that occasionally a single point will return double (or a higher integer multiple for some AUX_LINE frequencies) the expected number of counts. As the measurement starts on AUX, and stops on the gate, it implies that counter 0 is missing some of the gate edges. But these are generated by counter 1 and routed internally, so there wouldn't appear to be scope for interference or signal degradation on the gate signal.
The pro
blem occurs a single point at a time, for around (it varies, and isn't regular) 1 point in a thousand, for a 1kHz gate signal and 200 kHz AUX. It occurs for lower AUX frequencies too, but higher frequencies on either gate or AUX seem to make it worse. It appears not to happen (or very rarely) for some AUX frequencies.
Can anybody shed any light on what might be happening here?
Thanks,
Peter