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Two edge separation gives double counts

Hi,

I have a PCI 6602 counter-timer, which I am attempting to use to make a buffered two-edge separation measurement as follows.

Counter 0 is making the measurement, on the internal 80 MHz timebase. The gate is the output of counter 1, and AUX_LINE is being supplied externally.

This works fine, except that occasionally a single point will return double (or a higher integer multiple for some AUX_LINE frequencies) the expected number of counts. As the measurement starts on AUX, and stops on the gate, it implies that counter 0 is missing some of the gate edges. But these are generated by counter 1 and routed internally, so there wouldn't appear to be scope for interference or signal degradation on the gate signal.

The pro
blem occurs a single point at a time, for around (it varies, and isn't regular) 1 point in a thousand, for a 1kHz gate signal and 200 kHz AUX. It occurs for lower AUX frequencies too, but higher frequencies on either gate or AUX seem to make it worse. It appears not to happen (or very rarely) for some AUX frequencies.

Can anybody shed any light on what might be happening here?

Thanks,

Peter
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Are you working with an example program or are you starting from scratch? I would suggest working with an example program, if you aren't already, and see if you see the same problems. If you are using LabVIEW, there is a Two Edge Signal Separation (NI-TIO).vi shipping example.

Also, since this is not regular, make sure your external signal and the gating signal coming from Counter 1 are in the correct phase. If they are not synchronized correctly, that could be causing misreadings.
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I've used both the shipped example and my own program, and they give the same results. I've "fixed" the problem by switching the gate and aux signals, so the lower frequency signal is on the aux line, and adding "error detection" code, to spot this happening.

It would appear that the 6602 just doesn't like high frequency aux signals, and that they make it miss gate edges.
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