First, I'm impressed with your English -- you've expressed your question and description better than many natives!
Second, I may have a solution that doesn't require any external logic circuitry, though it will require both counters on your DAQ board. It goes like this:
GPCTR0 - the helper
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1. Configure GPCTR0 for "retriggerable pulse generation", with output mode set to PULSE (not toggle). Use the default output polarity = high pulse.
2. Configure the Gate to use your trigger signal, setting polarity to respond to falling edges.
3. Configure the Source to use the max internal timebase (20 MHz).
4. Program the pulse to have a total cycle time of 0.7 msec. This corresponds to 14000 cycl
es of your 20 MHz timebase. May as well set delay and pulse times equal at 7000 each.
5. Operation: each falling edge of the trigger signal will cause GPCTR0 to generate 2 pulses of 50 nanosecond duration. The falling edge of the 2nd pulse will occur exactly 0.70000 msec after the trigger signal.
GPCTR1 - the generator
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1. Configure GPCTR1 for continuous pulse train generation, with output mode set to TOGGLE (the default).
2. Configure the Source to be "other counter output" or "other counter TC", setting polarity to respond to falling edges.
3. Program the pulse to have the minimum legal delay and pulse times -- 2 source edges each.
4. Operation: on every 2nd falling edge coming from GPCTR0, the output of GPCTR1 will toggle its state. This should satisfy your timing diagram.
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