Z Index Reload during any phase of position measurement

[SteveP]

I'm using the Measure Buffered Position (NI-TIO).vi example with a 6602 board with two pulse encoding selected and Z Channel Indexing enabled. I do not have an encoder but use this for multiple event counting (using another gate input to latch the current count) with ability to reset the initial count back to zero using the Z Channel input. My signal used at the Z Index channel occurs randomly with respect to the clock at the Channel A input. Is there a way to allow the Z Index to reset at any phase of the Channel A input ? The Set Counter Attribute.vi can specify High or Low states of the A and B channels but I need to allow if to happen during any phase.

What are the timing requirements of the Z Index ? Mu
st it transition from low to high (what minimum pulse duration) ?
Does the reset then occur on the next positive going edge of the maximum board internal timebase ?
Does the Z Index need to be kept high through that transition of the next internal timebase ?

[rgharrison]

Hi Steve,

Yes there is a way to change the Z-index reload trigger based on the phase of the A and B channels, but it is configured in such a way that it needs to be a certain phase of A and B. It cannot be either high or low for A. The following knowledge base describes this configuration.

Z-Index Reload Phase in NI 660x Counter Boards.
http://digital.ni.com/public.nsf/websearch/C9D8039FBEF6DCAA86256B8C0060FA3A?OpenDocument

The requirements of the Z-Index are the same as the requirements for any other pulse for the NI-TIO counter/timer chip. It should be a rise or fall time no greater than 50ns and a pulse width of at least 5ns.

The reset occurs asynchronously when all conditions have been met. For example assuming the phase requirements for Z-Inde
x reload is that A is high and B is high, then the reload will happen asynchronously as soon as Z, A and B become high. The last one to become high will trigger the reload circuitry. To answer your last 2 questions, I don't believe the Z-Index reload trigger is dependent on the internal timebase. You also don't need to keep the Z-Index high through a transition of the next internal timebase.

Hope that helps out. Have a good day.

Ron

[SteveP]

Ron,

Does the Z-Index need to be held high during the time that the A and B channels also become high ? Or can it go back low before the A and B phase requirements are met ? Then when A and B phases become proper, reset would occur. If I make no connection to channel B, can I assume it is interpretted as logic high and then specify its phase requirement as logic high or is it best to make a physical connection to ground and specify its phase requirement as low ?

When I use a Z-Index with relatively long high logic level state and a 10 MHz clock into the A channel, I observe results that indicates the Z-Index behavior is not edge triggered but rather level senstive. My results imply the counter is held reset during the entire time of the Z-Index high
level duration rather than being reset only at its edge transition. Can you comment on this ?

Steve

[rgharrison]

Hi Steve,

If your phase requirement is that both Channels A & B are high then all three channels must be high for the reset to occur. Therefore, yes, you must have a pulse width of Z large enough to overlap with both A & B going high. Since you want to latch your data on the Gate edge and reset the count at the same time, you might want to OR your A, B and Z channels with the Gate signal so that the gate will cause all three channels to go high simultaneously. This means your Gate signal will cause a pulse simultaneously on your A, B and Z channels, thus causing a reset.

You are also correct about your observation that the Z-Index is level triggered and not edge triggered. So, yes, as long as the Z-Index is high you will get a reset (if
the phase criteria is met).

To control the duration of your pulse, you could use another counter to create a retriggerable pulse of a given pulse width. This means you would be able to control the width of your Z-Index value. This might not be an option if you are trying to conserve counters though.

Your best bet is probably to devise a simple "OR" circuit for each input with your Gate signal.

Anyway, just my thoughts.

Ron
Applications Engineering
National Instruments