08-20-2010
01:21 PM
- last edited on
04-25-2025
06:40 PM
by
Content Cleaner
Hi Mark,
Yeah, unfortunately these boards require the use of 2 counters to implement a finite pulse generation. In the background, Counter 1 is generating a gate signal to stop counter 0 after the appropriate number of pulses have been generated. The behavior is described in the M Series User Manual (page 7.22).
The 6602 will behave the same way, with counters grouped in pairs (0-1, 2-3, 4-5, 6-7). You're probably best off moving the Count Edges task over to one of the counters of the 6602 and using both counters of the 6259 for the DO Sample Clock. Alternatively, you could generate the clock from the 6602 and pass it to the 6259 through a RTSI cable if you desire, but it doesn't really seem necessary in this case.
Our newest generation of DAQ (X Series) has auxilary counters that run behind the scenes to generate the gate signal for a finite pulse generation, so you only have to use a single user-accessible counter for a finite pulse generation on these boards. There are 4 user-accessible counters on every X Series board.
Best Regards,