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Deal with Pxi-6555 input capacitance

Hi ,

 

 

 

I am trying to create a high-speed channel for communication with an IC. The high-speed signal channel works fine when the PXI 6555 is talking to the IC, but when the IC is taking to PXI 6555 until 11 MHz it is fine, but after 11mhz due to the input capacitance of 6555( this is with load from PXI 6555), the data is getting corrupted and it would not read the correct data as shown in pic "20mh-load". Although when I remove the input from IC to PXI 6555 and measure its signal( this is no load from PXI 6555), it is clean as shown in pic "20mh-load".

 

 

 

so my question is,

 

 

 

1) Are there any settings to remove the high input capacitance of 6555.?

 

2) Basically I have a 1-bit error ( which means the data is shifted to the right due to input capacitance ) so can I delay the acquisition and read it right?

 

 

 

I also used some dirty methods by deleting a first bit of data so that it shift to the left and it worked out fine, but i need some good methods to deal with it.

 

 

 

or any other ideas and questions are welcome.

 

 

 

Thanks.

 

 

 

 

 

B.R,

 

Tarun

 

 

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@tars364 wrote:

Hi ,

 

 

 

I am trying to create a high-speed channel for communication with an IC. The high-speed signal channel works fine when the PXI 6555 is talking to the IC, but when the IC is taking to PXI 6555 until 11 MHz it is fine, but after 11mhz due to the input capacitance of 6555( this is with load from PXI 6555), the data is getting corrupted and it would not read the correct data as shown in pic "20mh-load". Although when I remove the input from IC to PXI 6555 and measure its signal( this is no load from PXI 6555), it is clean as shown in pic "20mh-load".

 

 

 

so my question is,

 

 

 

1) Are there any settings to remove the high input capacitance of 6555.?

 

2) Basically I have a 1-bit error ( which means the data is shifted to the right due to input capacitance ) so can I delay the acquisition and read it right?

 

 

 

I also used some dirty methods by deleting a first bit of data so that it shift to the left and it worked out fine, but i need some good methods to deal with it.

 

 

 

or any other ideas and questions are welcome.

 

 

 

Thanks.

 

 

 

 

 

B.R,

 

Tarun

 

 


No, there are no settings because it is something parasitic to the circuit and not added which can be removed. Typically the cable and trace capacitance exceeds the instrument's input capacitance, what kind of cabling do you use?

 

If it is a known shift in data, you can correct for it in software implementation.

Santhosh
Soliton Technologies

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I have made a PCB for the high-speed channel circuit but for now, I use enameled copper wire.

 

Do we know approx how much input capacitance it has? is it more than 200pf? ( i couldn't find it in the datasheet)

 

I will try out to correct the data in the code. ( for now, i did the left shift deleting the first two-bit of the data )

 

is the left shift possible by delaying the acquisition of the HSDIO library? 

 

Thank you

 

B.R,

Tarun

 

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