Digital I/O port by port (PCI-6503)

[milistaff]

HI,

I tried to control stage by PCI-6503.

FYI, figure below shows pin connections.

And, the two figures below show write and read cycle respectively.

Write Cycle.

Read Cycle.

And, I have a code for write and read cycle in the legacy function.

Important lines for writing cycle is

//initial configuration

status = DIG_Prt_Config(device, PORT_A, NOHANDSHAKE, INPUT);
status = DIG_Prt_Config(device, PORT_B, NOHANDSHAKE, INPUT);
status = DIG_Prt_Config(device, PORT_C, NOHANDSHAKE, OUTPUT);

//take R/W bar in port C high

CurrentState = 0x40;
status = DIG_Out_Port(device, PORT_C, CurrentState);

(Code for checking status through PORT_A is abbreviated)

//configure port A, B as output

status = DIG_Prt_Config(device, PORT_A, NOHANDSHAKE, OUTPUT);
status = DIG_Prt_Config(device, PORT_B, NOHANDSHAKE, OUTPUT);

//set address for LSB

CurrentState = 0x20;
status = DIG_Out_Port(device, PORT_C, CurrentState);

//write data

status = DIG_Out_Port(device, PORT_A, (int)lobyte);
status = DIG_Out_Port(device, PORT_B, (int)hibyte);

// Take the STROBE line high to LATCH in the LSB data

CurrentState = CurrentState | 0x80;
status = DIG_Out_Port(device, PORT_C, CurrentState);

//set address for MSB

CurrentState = 0x10;
status = DIG_Out_Port(device, PORT_C, CurrentState);

//write data

status = DIG_Out_Port(device, PORT_A, (int)lobyte);
status = DIG_Out_Port(device, PORT_B, (int)hibyte);

// Take the STROBE line high to LATCH in the MSB data

CurrentState = CurrentState | 0x80;
status = DIG_Out_Port(device, PORT_C, CurrentState);

....

In this code, DIG_Prt_Config is only called when the configuration need to be reset.

I tried to simulate this code in DAQmx, but in task approach it seems not simple.

I need to use DAQmx Create Channel VI and the DAQmx Start Task VI again and again whenever I write, because of the order of the writing.(see red part in code, writing on  PORT A,B,C, C, A,B, C, C...) In other words, I need to use (create channel VI, DAQmx start Task, DAQmx Digital Write, DAQmx clear task) sequence whenever the port I would write something on is changed. So, configuration (as I know, DAQmx Create Channel VI and the DAQmx Start Task VI sequence is equivalent with configuration) is needlessly called many times. And, I think it cause a problem on the performance, which is arisen from the property of 82C55 digital chip. About this issue, refer

-http://digital.ni.com/public.nsf/websearch/3E25A9780F2C48B986256120005AF098

-http://forums.ni.com/t5/Digital-I-O/PCI-6503-One-Port-In-One-Port-Out/m-p/119456

So, my question is how can I imitate the code above with DAQmx?

[milistaff]

To clarify, I'm attching one more figure. That's the part of what I write for imitate write cycle. And I confirmed that writing command to stage controller is not working. But reading something from stage controller is possible. So, I think there is no problem in the connection between stage controller and PCI 6503.

Please read from bottom to up.

[HeatherBaker]

Hi milistaff,

Try creating something like that attached example, where each stage has its own case in a case structure and the reference is passed around via shift registers to eliminate creating the channel and start task everytime.  Hopefully this helps!