Interfacing with a JTAG state machine on a FPGA using the USB-6229 device

[Michael_Limerick]

Hi KC,

Yeah, I'm still working on the VI for the JTAG state machine. I have the basics of it working, I just have to modify it for my own needs.

I've moved away from the USB-6229 and I'm now using a PXI-7813R, it seems to be an easier card to work with.

Regards,

Michael.

[K C]

Just to be sure; you know that there are Jtag controllers (also with LV support) on the market ?

[Michael_Limerick]

Hi KC,

Are you talking about JTAG technologies?

Michael.

[K C]

Yes, Jtag technologies and there are more suppliers with Jtag boards.

I don't exactly know if you can buy a controller with LV support without the software for Jtag test. The software is very expensive, but the last time I was involved in buying this was over 10 years ago. So I am not up-to-date about what is on the market.

[Karl_Miles]

Are you trying to communicate with the FPGA core or control the pins directly.

Which FPGA vendor is the target, I have some app notes that I have collected for each vendor regards communicating with the core.

I work for GOEPEL (www.goepel.co.uk) in the UK, depends on what you want to do and what you consider expensive vs ho wmuch time you have.

Controlling is not that complicated it is generating and interpreting the vectors that is the time comsuming part.