03-11-2014 04:19 AM
Hello,
I'm looking to purchase the NI board PCIe-7841R and It is specified that its frequency is 40MHz.
this means that it contains an oscillator working at 40MHz?
Also, Can I connect a digital IO to a clock of 60MHz that will be used by a VHDL module implemented in the FPGA of this board?
Thank you,
03-11-2014 06:50 AM
40MHz is the clock rate for the FPGA on the card. That is also as fast as the DIO can go. So hooking up the 60MHz clock will not likely work.
03-11-2014 08:03 AM
@crossrulz wrote:
40MHz is the clock rate for the FPGA on the card. That is also as fast as the DIO can go. So hooking up the 60MHz clock will not likely work.
why not?
Xilinx FPGA have no fixed frequency but it depends on the design to be implemented on it
and I think that some digital outputs will be connected directly to FPGA interface in the NI board, so why I can't use an input as a clock?
Otherwise, what is the solution?
03-11-2014
08:54 AM
- last edited on
02-19-2024
01:12 PM
by
migration-bot
Hey Mejdi,
The R Series board that you're looking at doesn't have any signal conditioning built in. You absolutely can have the IO execute in a 60 (or even 120) MHz clock domain, but if you try to switch that quickly, you'll end up with output like the following: PCI/PXI R Series DIO Signal Quality At High Frequencies.
Perhaps something like the NI USB-7855R would be better suited to your needs? It has 32 lines that should be good for up to 80MHz switching.
03-11-2014
09:43 AM
- last edited on
02-19-2024
01:12 PM
by
migration-bot
@T-REX$ wrote:
Hey Mejdi,
The R Series board that you're looking at doesn't have any signal conditioning built in. You absolutely can have the IO execute in a 60 (or even 120) MHz clock domain, but if you try to switch that quickly, you'll end up with output like the following: PCI/PXI R Series DIO Signal Quality At High Frequencies.
Perhaps something like the NI USB-7855R would be better suited to your needs? It has 32 lines that should be good for up to 80MHz switching.
The problem that I need many IOs not only 32.
so you confirm that I can connect a DIO to a 60MHz clock, then use it in the FPGA as clock?
Is there a shematic of this board?
03-11-2014 09:49 AM - edited 03-11-2014 09:49 AM
so you confirm that I can connect a DIO to a 60MHz clock, then use it in the FPGA as clock?
Oh, I guess I misunderstood your original question. No, you cannot import a 60MHz clock using one of the DIO lines of this board. The reason I mentioned above is still in play... the board doesn't have signal conditioning present, and the clock signal would be too dirty at that frequency.
03-11-2014 09:56 AM
DIOs are not connected directly to FPGA pins?
is there a schematic of the board?