USB-6501 4.7K pull-up resistors, replacing

[RWatkins]

Background:  I currently have an application for which I am using USB-6501.  Previously the I/O interface was to level shifters interfacing an FPGA evaluation board where the level shifters had a fairly strong output level.  We just shifted to a new I/O interface that uses TI TXB0108GYR interface devices.  These devices have a much lower threshold externally to change the internal held signal level.  The data sheet for these devices limits external pull-up to 50K ohms.  As I am currently communicating at relatively slow speed, 50K as opposed to 4.7K does not seem to be an issue, and I am ready to replace the resistors on the board to these values.  One concern that must be answered prior to doing this to two USB-6501 boards is the current configuration of the C8051F320 I/O ports.  I have opened the USB-6501 enclosure and can readily see that the 4.7K resistors are easily replaced.  We do have appropriate ESD workstations and soldering equipment for rework.

Question:  What is the programmed condition of the weak pull-ups on the C8051F32?  Are the weak pull-ups disabled or enabled?  This will impact my choice of resistors, and may in fact mean I only need to remove the 4.7K resistors.

[RWatkins]

An update:  The TXB01008GYR level shifter on the terasIC THDB-SUM board does not understand TTL interfaces well.  If the pull-up resistor is low enough (as supplied in the USB-6501, 4.7K) to work properly with the USB-6501 transmitting to the level shifter, the impedance is too low to receive data reliably as we have observed in our application.  When we changed the pull-up resistors to 47K as recommended as the lowest reliable DC load by TI for bidirectional communications, we received data reliably, but now could not reliably transmit information in the TTL mode.  After review of several other threads here, it was found that there is an active mode that implements 3.3V CMOS logic levels with about 8 mA drive capability (although the 4.7K original resistor would have some impact here on total capability high and low).  Since I have begged over the phone for NI to provide me with a 3.3V CMOS interface DIO device and been told none was available, I was both elated that the design of the UXB-6501 allows this, and flabbergasted that the apps engineers I talked to on the phone didn't immediately point me to it.  It may be that they are also not allowed to review the schematics of the black boxes they are supporting so just were not aware of it.  As an EE, I simply opened the package to replace the 4.7K resistors with 47K resistors and was greeted with a very interesting internal design having a switch controlling the 5V pull-up DC.

Current status:  I have changed all resistors from 4.7K to 47K to ensure the USB-6501 will properly interface the TI level shifter.  (to those without ESD solder stations and proper tools, these are 0603 SMT resistors in tight quarters, not a lot of fun without proper tools and a steady hand, and the board when out of the enclosure can be ESD sensitive)  We are currently trying to figure out how to properly program the USB-6501 to operate in the push-pull mode (CMOS totem-pole output, 3.3V nominal levels).

Help still needed:  Agilent VEE documentation and National Instruments examples seem a little sparse regarding the use of and access to the proper functions here, but we are still searching.  Based on other threads, there are others who have succeeded in doing this with C and LabView/LabWindows.  Some example code here for any and all of these would be appreciated.

[mallorim]

Hello,

It sounds like you have the replaced resistors working without problem. In order to get the USB-6501 working in push-pull mode you can use a DAQmx Property node. As can be seen on page 14 of the 6501 User Guide and Specifications, the push-pull functionality is called "Active Drive" in DAQmx terminology. This Discussion Forum and Knowledge Base 3Q3DA30K both discuss how to set this property.

Regards,

Mallori M.

[AAL]

Hello

I have a follow up question about the hardware for switching between the active (pull-push) and open collector modes: Can the mode (open drain/pull-push) of the hardware lines be controlled separately (individually/per bit) or together (per port)?

Thank you

Regards

Albert Lysko

[Kira_T]

Hey Albet,

These functions can be card specific.  What card are you trying to change the mode on?  With this information we should be able to determine how the modes are controlled.

Regards,

Kira T

[AAL]

Dear Kira,

Thank you for a quick reply. The card is USB-6501.

Regards

Albert

[Kira_T]

Hi Albert,

The mode is controlled per port on the USB 6501.

Kira T

[AAL]

  Dear Kira

I notice that DAQmx/LabView permit me to set the attributes per line, not just per port. May I suggest that the following would be introduced:

1) a line added to the documentation/specifications for the card to highlight that the 3.3V/5V control is "per port", not "per line";

2) DAQmx should give a warning on setting the property "per line", when the device only supports "per port" (I thought of proposing to generate an error but this might be less compatible with the existing programs; on the other hand, it might be easier to fish out an error, compared to a warning)

Thank you

Best regards

Albert