In our system under development we will use a PCI 6553 board to control a bunch of setup registers in a FPGA.
16 bits are used to carry data. This can be 16 bits (including address) to the FPGA or read back from those registers (all 16 bits will be used for read back, as we will 'fake' the address bits).
This fits nicely into Group 1 in the board configuration. The data flow in or out will be at medium speed (8255 mode with handshake).
In addition we have some system control lines 5-8 in all (fixed as output), which will be controlled rather slowly on a bit basis.
This leaves the last 8 of the 32 I/O bits on the board.
Can these be configured and used as inputs in our system ?
We need to monitor a few status signals from the FPGA. This also on a slow, maybe bit like basis.
The software only works with groups 1 and 2, which I guess have already been used for the data and control ports.
Or could Group 2 be configured as a 16 bit wide bitwise controlled I/O?
Are there other ways to configure the last port?
As we do not use any handshake on group 2, these signals can be used as read/set on a bit level through a 5th port on the board. This I know, but how many inputs do we have here?
In case the last 8 I/O bits cannot be programmed as input in our system, we may have to multiplex our status signals onto whatever fixed inputs are available in the boards status port.
At least the Ack signal for Group 2 should be available, but are there more?
Best regards
Jan Hviid
DDRE, Copenhagen
