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exporting the clock signal in PCI-6552

In PCI-6552, the output clk of the example "niSDIO, dynamic generation with exported clock", in continous mode running is not a continous signal, it has a duration of 2.5ms (for 50 MHz clk), and after then there is no clock signal for 40 ms. Is there any way to have a continous clk signal at the clock output port of PCI-6552? I would like to use this signal as the clk input of PCI-5122.
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Hello gues1,

What do you mean by "continuous mode?" Does that mean you click on the Run Continuous button in LabVIEW? Please notice the "Do Not Export" command at the end of the example.

When programming hardware, you typically do not want to use the run continuous button...instead, make the operation continuous through programmatic methods. Take a look at the Dynamic Generation with Repeat Mode example. Combine the concepts in that example with the Export signal VI as shown in the example you were using previously. The result should be a program that will generate data continuously and export the sample clock continuously, all of which can be stopped programmatically by the user.

I hope that helps.

-Allen
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