01-25-2008 12:07 AM
01-25-2008 08:47 AM
Hi Ash-
My guess is that the DIO programmable power-up states for your device are set to power up those lines as logic high. There is no way to configure this in the MHDDK, but you could make the change on a Windows machine running NI-DAQmx (via Measurement and Automation Explorer, right-click on the device and set the power-up states under the Properties window).
Alternatively, you could make the call to writeLowerPort() to set the lines low and then set the PFI directions to output. This should have the effect of isolating the output lines from the output driving hardware until the line states are set to what you expect.
Hopefully this helps-
01-25-2008 05:58 PM
Hello, Tom
Thank you for you reply.
>My guess is that the DIO programmable power-up states for your device are set to power up those lines as logic high. There is no way to >configure this in the MHDDK,
I see. Actually the power-up line logic is not a big problem for I seem to be able to avoid taking your advice.
The thing I'm a bit confused is that the fact if I make a bit logically high(1), that makes the actual line low.
I can make my driver for this logic inverse logically just like when the request outp(0x01),the driver actually writes value 0xF7.
But if this logic is configurable, that would help me to make this logic normal. Besides, I would be pleased if you could give me some more sample about PFI configuration, neverthless of this issue can be solved.
Thank you
Ash
01-29-2008 10:13 PM
Hello
As Tom says, regarding the device circuit for PFI, I found this logic cannot be changed, because the TTL input signal should be driven as negative logic. I found a description about the board in a M series user's manual. Some devices have pullup circuit inside of the devices so that the low(0) signal can be acknowledge as high(1) by devices.
I'll make myself understood the inverted signal is one of NI device's features.
Thanks
Ash