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DRQ line and Scatter-Gather DMA for the 6533

I've been working on writing my own driver based on Windows Driver Foundation (which is fairly easy to use...) for the PCI-6533; anyway, the documentation that I have been able to find on the MITE PCI/DMA controller tells me that doing a scatter-gather list for DMA should be possible.  However, all it says about doing this is that it is not yet implemented in the examples.  This is probably because writing the driver to do this is hard. 
 
MY QUESTION IS: is there any official (or unofficial) documentation about the MITE ASIC that tells what you need to do on this chip to implement scatter-gather?  (I already have a rough draft of "MITE RLPM" )  Any more documentation on the MITE ASIC would help in general as well! 
 
ONE OTHER QUESTION: this documentation says that the DRQ line specified for the MITE DMA controller must match the DRQ line that the DAQ board has been configured for - I know how to set the MITE DRQ line, but how do you configure the DRQ line on the DAQ board?   I couldn't find this anywhere
 
thanks!
Matt
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