What is 4 bit address map of AT-MIO-16E-10 Cal Dacs?
This is a three part question that refers to reading the EEPROM on the AT-MIO-16E-10 for the purpose of calibrating the DACs. I'm using C on a PC in DOS and following the guidance of Chapter 5 (Calibration) of the Register Level Programmer's Manual.
1. The N.I. manual does not give an address map of the CalDacs. I can only infer that "Factory CALDAC 3" from table 5-2 on page 5-4 has address 3 (0011 binary) and the other CALDACs follow suit. Can anyone confirm that?
2. I got some good information from the document " How Do I Read the EEPROM Information from an E-Series Board" From:
http://digital.ni.com/public.nsf/allkb/7923356b383f5eca852563a7004a3b8b The general case (from the doc above) to clock instruction and address bits into the EEPROM via the Serial Command Reg are:
- load the data/addr bit
- clock up
- clock down
- load the next bit
- clock up
- clock down
If the data is unchanging (string of zeros or string of ones), do you still need to "load" the bit in a separate write to the Serial Command Reg? (or can you just clock up / clock down in succession). The timing diagram in the manual appears to indicate that you can.
3. The "How do I read the .." doc describes a data read with
- Clock up
- Read bit (from PROMOUT of Status Reg)
- clock down
- clock up
- read next bit
- etc.
I noticed that the Xicor 25040 EEPROM data sheet specifies (SCK = clock):
"Data input on the SI line is latched on the rising edge of SCK. Data is output on the SO line by the falling edge of SCK."
This matches for the inputting of instruction data and addresses, but is opposite w.r.t. reading from the PROMOUT bit.
Does the AT-MIO card offset the EEPROM clock by a half cycle on reads? (assuming that the "How do I .." doc is correct.)
I have not tried this yet.
Thanks in advance for any insight you may be able to offer.
Regards,
Jim
