07-18-2007 04:55 PM
07-19-2007
09:07 AM
- last edited on
06-12-2024
10:30 AM
by
Content Cleaner
Hi Rob-
A couple of thoughts-
1. AI_SCAN_IN_PROG_St will only be high during an active scan cycle. It should not stay high during the entire acquisition. So, if you're using a single channel or a multi-channel acquisition with a very fast convert clock then you might not be able to observe status changes of that bitfield by polling.
2. This might be an obvious question, but which polarity did you set in AI_FIFO_Flags_Polarity for your FIFO flag registers? It may be that they are set to active low and that the FIFO is not always empty. Can you elaborate on how garbage-y your data is? Is it seemingly random, or does it correspond to your input signal in any way?
Is your example based on the MHDDK examples? Have you considered using those examples directly or NI-DAQmx Base? If you wouldn't mind posting some of your device setup code we could probably give better feedback.
Hopefully this helps-
07-19-2007 11:40 AM
07-22-2007 02:44 PM
07-24-2007 09:00 AM - edited 07-24-2007 09:00 AM
Hi Rob-
AI_SI2_Q_st gives feedback on the state of the AI_SI2 counter state machine. This is the counter that controls the AI convert clock (i.e. the clock that advances the multiplexor on the board and clocks the ADC for each sample in your scan). A value of 2 means that the SI2 counter is waiting for a valid AI_Start (aka AI sample clock) signal to occur. This most likely means that your sample clock is not running.
Are you using an externally- or internally-clocked acquisition? Can you please post the code that shows the setup for your AI timing and triggering?
Message Edited by Tom W [DE] on 07-24-2007 09:00 AM
07-25-2007 09:45 AM
07-25-2007 09:50 AM
Hi Rob-
Glad to hear it- let me know if you run into anything else.
Thanks-