OK, still working on the 6229 driver - in particular setting up the AI_Config_Fifo_Data register before an AI read. The spec says the bottom 4 bits are the channel number, then the next two bits are the bank. I've found no real explanation what a "bank" is. However after looking at the examples, it appears the bank is simply bits 4 and 5 of the channel number. There is all this bit shifting to and out those 2 bits, shift them down 4 bits, then later they are shifted back to the left and ored back in. As best I can tell, one could have simply done a
AI_Config_Fifo_Data |= channel;
Maybe & channel with 0x3f, just to be safe. Anyway, am I missing something in the DDK code, or have you guys just taken something really simple and make it just a bit more obscure?
Thanks.