It is not possible to run multiple 4472's at different sampling rates when these boards are synchronized.
If you're using a PXI system, the 4472 located in slot 2 will generate the clock (actually, an "oversampling" clock since Delta Sigma converters are used) and will export it to the appropriate PXI_STAR lines so that other 4472's may use it.
As of today, there is no divider on the 4472 that would allow you to divide the sampling frequency so that multiple boards are still synchronized but running at different sampling frequencies.
If your second board is for display only, you may want to decimate the result before displaying it or display only one block of data out of n.
That will not decrease the memory usage needed by the acquisition but wi
ll release some CPU load.
I hope this helps
Gerald Albertini