Overview
Digital predistortion (DPD) is a technique for improving device linearity that works by applying an inverse distortion to the complex baseband signal prior to generation. The desired effect is that the predistortion cancels the distortion introduced by the device, resulting in a net linear response. DPD is a topic of ongoing research and many algorithms have been proposed in the academic literature. In this example, we show the signal processing required to solve some popular DPD models, specifically, the memoryless polynomial and the Simplified 2nd-Order Dynamic Deviation Reduction (DDR2) models.
Hardware and Software Requirements
- LabVIEW 2014 or later (64-bit recommended)
- RFmx SpecAn 2.2 or later
- RF VSG and VSA
- PXIe-564xR or PXIe-5840 recommended
Steps to Implement or Execute Code
- Open Examples\DDR DPD Example.vi and configure the RF parameters corresponding to your setup.
- Specify the predistortion model (Polynomial or DDR2) and configure the polynomial order and, in the case of a DDR2 model, the memory taps.
- Specify the scaling to be peak or RMS scaling. If peak scaling is selected, the peak output power before and after DPD is the same. If RMS power is selected, the algorithm tries to maintain the RMS power before and after DPD. This can result in divergent behavior if the device is highly compressed.
Additional Information or References
- Simplified Second Order Dynamic Deviation Reduction (DDR2) model is an implementation of the model published by Lei Guan and Anding Zhu in "Simplified Dynamic Deviation Reduction-based Volterra Model for Doherty Power Amplifiers" in Integrated Nonlinear Microwave and Millimetre-Wave Circuits (INMMIC), 2011 Workshop on, April 2011.
- The code is open source and is not optimized for memory or speed. The DDR2 model extraction and predistortion requires a significant amount of memory, as implemented. 64-bit LabVIEW is recommended.
Sean Ferguson
Application Engineering Specialist | RF and Reconfigurable Test