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Overview
The example demonstrates how to performs a two edge separation measurement between two boolean controls.
Description
A two-edge separation measurement measures the time between the rising or falling edge of a signal and the rising or falling edge of another signal.
The example implements a two-edge separation measurement that can be used either in a Single-Cycle Timed Loop (SCTL) or a While Loop on any FPGA with at least two digital inputs.
Requirements
Software
Hardware
Steps to Implement or Execute Code
Additional Information or References
SubVI:
**The code for this example has been edited to meet the new Community Example Style Guidelines. The edited copy is marked with the text 'NIVerified'. Read here for more information about the new Example Guidelines and Community Platform.**
Example code from the Example Code Exchange in the NI Community is licensed with the MIT license.