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sfloat24 converter tool version 1.1

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sfloat24 converter tool version 1.1 — Documentation Introduction This tool is useful to understand how a FPGA device, or any processor, stores a floating point number in its registers. This tool is also useful when a Matlab/Simulink® simulation is executed in order to test a control strategy implemented on a FPGA device, using the Altera® DSP Builder tool, when this strategy uses the developed math library. The advantages of using this utility have been explained in detail in the previous sections. System requirements The software has been developed using the NI® LabView 2011 software for writing the graphical user interface (GUI) and MS® Visual Studio 2008 for writing the kernel (included in the “sfloat24_DLLv04x64.dll” for Windows 64 bit platforms and “sfloat24_DLLv04x32.dll” for Windows 32 bit platforms) of the tool. This tool works under MS® Windows 32 and 64 bit platforms and requires NI® LabView 2011 installed on the host system. In the development phase the software has been tested under: MS® Windows XP Professional,  MS® Windows 7 Ultimate, 32 and 64 bit editions. Description and usage of the tool The usage of the developed tool is very simple, given a floating point number (decimal format), it is sufficient to insert it in the first text field and press the “sfloat24 bit word layout” button. A this point appears the bit word corresponding to the inserted number, its corresponding Unsigned 24 bit integer (UInt24) value, and, only for debug purpose, the tool returns the initial inserted value, as shown in the following Fig.: [image_01.bmp] Fig. 1: GUI of the sfloat24 converter tool, when a sfloat24 bit word conversion is performed. It is important to see, is some cases, that the decimal numbers that appear in the “In:” text field and in the “Output:” field are slightly different. This circumstance is due that the inserted value is interpreted as a single/double precision and the returned value is a short floating number (sfloat24) value. For educational purpose it is also possible to write a 24 bit word (sfloat24) to see the corresponding floating point value as depicted in the following Fig.: [image_02.bmp] Fig. 2: GUI of the sfloat24 converter tool, when a sfloat24 bit word to decimal number conversion is performed. To write the sfloat24 bit word it is sufficient to press on the round green buttons, as shown in the above Fig. and press the “sfloat24 bit word to corresponding decimal value” button. At this point the labels representing the fields of the sfloat24 word are updated and the Uint24 value and the corresponding decimal value are shown. It is important to see that, in this case, the first row (fields: “In:” and “Output bit:”), must be ignored, in fact it is relative at first case of the usage of the tool. To terminate the application it is sufficient to press “Stop” button. Caution !!! Note: To use this software it is important that the GUI, subVIs and the dynamic link library must be copied in the same directory. If the DLL is located a different path, in the Block Diagram of the software it is sufficient to click on “Call Library Function node” blocks to change the path of the “sfloat24_DLLv04x64.dll”/ “sfloat24_DLLv04x32.dll” library. sfloat24 Converter tool --- Software components N. VIs - Sub(VI)s - Libraries Description Diagram location 1 sfloat24_v01_x32.vi                 sfloat24_v01_x64.vi                 Main GUI – User interface – — 2 Mantissa_Field (subVI) This subVI converts the bit sequence written by the user in a binary string representing the Mantissa field. Event Structure: case 1 3 Exp_field (subVI)                 This subVI converts the bit sequence written by the user in a binary string representing the EXP field. Event Structure: case 1 4 Mantissa_to_float (subVI) This subVI converts the bit string of the fractional part of the mantissa field in to corresponding implicit decimal value:                                                                 M=1.ffractional part=1+(fractional part)DECIMAL. Event Structure: case 0 5 Exp_to_float (subVI)                 This subVI converts the bit string of the EXP field in to decimal number:  where e=EXPDECIMAL-BIAS(63). Event Structure: case 0 6 Except_handler (subVI) This subVI handles the numeric exceptions: ±∞ and Not A Number. Event Structure: case 1 7 About_Menu (subVI)                 Shows the information about the developed tool. Event Structure: case 3 8 sfloat24_DLLv04x32.dll*                 sfloat24_DLLv04x64.dll* Dynamic Link Library includes:                                                                 - real_to_n24bstd02(single/double precision number) returns the corresponding UInt24 number..                                                                 - string_to_usnumber(C string pointer) returns  the corresponding Uint24 value.                                                                 - n24bstd_to_real(UInt24) returns the corresponding single precision value. (*) This software is the proprietary, copyrighted property of F. Parillo. The software has been developed to demonstrate how is possible to use a short version of floating point number, called by the author sfloat24, to implement complex control strategies on FPGA devices as depicted in the following scientific publications reported in the file "NLV_Application_descript". The software uses the library “sfloat24_DLLv04x32.dll/sfloat24_DLLv04x64.dll” that implements the following conversion routines: • decimal number to sfloat24 bit word; • sfloat24 bit word to unsigned 24 bit integer; and • the conversion of the unsigned 24 bit integer (representing the initial decimal number) to decimal number. This library is covered/protected by F. Parillo Intellectual Property (F. Parillo IP) being author of several papers above shown. Copyright© 2007-2012 F. Parillo.

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