Synchronization sample-rate PXI-6289 AO and PXI-5922

[Fred.Schimmel]

Voor een research project heb ik een PXIe-1073 aan een Dell-PC met Windows7-Professional gekoppeld. In het chassis zitten een PXI-6289 MIO-boarden een PXI-5922 digitizer.

Met AO-ch0 van de 6289 genereer ik een 10kHz sinus waveform van 8000 samples met 800kS/s (regeneration allowed), die via een versterker naar mijn experiment gaat. In het experiment meet ik de ingaande stroom en de resulterende golfvorm met de twee channels van de 5922 met een sample-freq van 800kS/s.

Om de acquisitie van de 5922 synchroon te laten lopen met de generatie heb ik een counter in de 6289 geconfigureerd voor 'Frequency Division', waarbij de Sampleclock van de 6289 AO wordt gedeeld door het aantal samples. Het resultaat is een trigger-puls per 8000 samples, die ik naar de externe Trigger input van de 5922 stuur.

De tot nu toe beschreven configuratie werkt zoals bedoeld.

Uit de resultaten concludeer ik dat de AO sample-rate van de 6289 en de AI sample-rate van de 5922 een klein beetje verschillen. Daarom wil ik deze synchroniseren.

Daarvoor heb ik mijn programma aangepast:

- in de configuratie van de AO-task  van de 6289 een DAQmx-Timing property-node (ReferenceClk.src=PXI_10) toegevoegd

- in de configuratie van de 5922 heb ik een NIscope_Configure_Clock toegevoegd met 'PXI_Clock'als Reference Clock Input en Master? = False.

Zie voor deze versie het eerste attachment, 

Als ik deze versie will runnen krijg ik een foutmelding dat de routing niet gemaakt kan worden (zie tweede attachment). Maak ik een denkfout?

In debug mode (lampje aan) zag ik dat de foutmelding gegenereerd wordt door 'Start Task' van de AO-task voor de 6289, niet door een van de configuratie-VI's.

Kunnen jullie aangeven hoe ik de twee sample-clocks kan synchroniseren?

Bij voorbaat bedankt voor de moeite,

                                                            Fred Schimmel

[ThiCop]

Hello Mr. Schimmel,

Please be aware that this part of the forum is in English.

By posting your question in Dutch you only reach a limited amount of users.

Also, other users might not be able to gain information from this post later on.

Can you repost your questions in English?

[Fred.Schimmel]

I should admit I posted this question by accident, in fact I wanted to send a support request to the dutch representative of NI

Here below my question again, in english:

For a research project (digital readout of displacement by a LVDT) I connected a PXIe-1073 chassis to a Dell-PC with Windows7-Professional. In the chassis 2 boards are present: a PXI-6289 MIO and a PXI-5922 High-speed Digitizer.

With AO-ch0 of the 6289 I generate a sine-waveform of 10kHz, in 8000 Samples at 800kS/s (regeneration allowed). I measure the current through the primary coil of the LVDT and the voltage, induced in the secondary coils with the two channels of the 5922, with a sample-rate of 800kS/s. To synchronise the acquisition of the 5922 I neeed a trigger signal each time the generation of a new set of 8000 samples is started. As the 6289 has no provision for this, I configured a counter in the 6289 for 'Frequency Division' with the AO-SampleClock as input and the #Samples of the 5922 acquisition as divisor. The resulting signal is used as external trigger for the 5922..

The configuration described so far works as expected.

From the results I concluded that the timing of the two boards is a bit different, so I decided to synchronise them. I modified my program as follows:

- added in the configuration of the AO-task a DAQmx-Timing property node (RefClk.src=PXI_10), see sub-VI 'LVDT_VC_Config_SignalGeneration_v5_0_HVoet.vi'

-added in the configuration of the 5922 the 'NIscope _Configure_Clock.vi' with 'PXI_Clock' -constant connected to 'Reference Clock Input' and False connected to 'Master?', see sub-VI 'LVDT_VC_Config_Scope_for_Readout.vi'.

When I try to run this modified version I get an error-message, stating that the requested routing can't be realized, because the source is already in use (see the text-file in the attached zip-file). Do I make a mistake? Should I configure in a different way? It seems to me that every board in a PXI-chassis should be able to use the 10MHz clock from the crate.

In debug mode I saw that the error is generated by the 'Start-Task.vi' that should start the waveform generation.

Can anyone point me out how I should configure the synchronisation?

Thanks in advance,

                                           Fred Schimmel

[ThiCop]

Hello Mr. Schimmel,

I just also saw that you have sent a support e-mail to our inbox.

Through which channel would you prefer to continue the communication? (E-mail or Forum)

[Henrik_Volkers]

You should be able to use the TCLK vis to do the sync .

[Fred.Schimmel]

Dear Henrik,

Thanks for your reaction.

I already solved my problem, based on some directions from a NI support engineer.

He pointed out how to lock the sampleclocks of both modules to the PXI-10MHz clock. However, when I did so I got errors from some other tasks, complaining that required resources were occupied by the task with the locked sampleclock. By trial and error I found that I explicitly should lock the sampleclock of each task to the PXI-10MHz to avoid the errors I mentioned.

I can imagine that the sampleclocks, available for the other task (on the same module) are in fact the same as the one of the AO-task (which was locked) and that the configuration of an non-locked task can't be realised because there is no non-locked sampleclock available. If that is the case, the error-message is, strictly spoken, correct. On the other hand, such an error gives a user not any direction to the real problem, and certainly not a hint to solve it.

As far as I know TCLK is a rather new mechanism, not supported by the boards I have, at least not by the PXI-6289.

If you or anyone else want more details on what I did, please let me know,

best regards,

                                                       Fred