Thanks for your response, Josh. Yes, I've tried the PXI clock line, but the signals from the slave boards are all out of sync. Just to be sure, this is how I called using the PXI clock :
Master: niScope_ConfigureClock(PXI_CLOCK, NO_SOURCE, NOURCE, true);
Slaves: (all 4) niScope_ConfigureClock(PXI_CLOCK, NO_SOURCE, NO_SOURCE, false);
Code will run without the "PLL not locked" error, however, the signal from the slave boards are all bad!
I don't know how to route a sync_pulse line from the master to slaves using the PXI_CLOCK line, maybe this is why I got the invalid signal... The original sync calls:
Master: configureClock(NO_source, RTSI_Clock, RTSI_1, true);
Slave: configureClock(RTSI_Clock, No_SOurce, RTSI_1, false);
These calls
will generates the PLL-NOT-LOCKED warning.
Thanks