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Generate sinus in FPGA

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Hi,

I did the modulation in the FPGA (with the value of I, and Q to 0), and it's working very well.

So I don't need to use the FPGA for the sinus, it's the DDS core of the DAC which generate it. I just need to configure it in the host.

 

Thank you for your help

 

Cordialement,

Simon D.
CLA | Certified LabVIEW Architect
CTA | Certified TestStand Architect
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Thanks for feedback!

 

Nice to see that the idea works for you. Smiley Happy

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