compile result of clock

[Ex-NISH2]

After the compile, LV FPGA gives a summary of clock tolerance, but when I want to review it after clicking on OK, I can not find it in the xflow.log file.  Where can I find it, or how can I calculate them out from Xilinx xflow?

Note: I want to review information like this:

Clock Rates: (Requested rates are adjusted for jitter and accuracy)
  Base clock: Configuration_Clk
      Requested Rate:      20.000000MHz
      Theoretical Maximum: 47.109813MHz
  Base clock: DAC_0_IQ_Clk
      Requested Rate:      100.020004MHz
      Theoretical Maximum: 100.694794MHz

[JerryAL]

Hi

You want the build.rpt.

You can find it in the following directory:

C:\NIFPGA82\clntTmp\......  There will be a number of subdirectories that correspond to different LV FPGA VIs that you have compiled.  Look for the one with a time close to when you last compiled.

The following is an example for one I just compiled: C:\NIFPGA82\clntTmp\ni5640RL3~17_FPGATarg~A7_ni5640RL~FD_gd5Npwv2~BB

You can open it with Notepad.

Jerry