05-26-2006 09:40 AM
|
NI PCI 1588 guarantees a clock accuracy upto +/- 230ns.I have two questions regarding the same. 1.Does it compensate for clock drift.If not ,how can it achieve an accuracy in the ns range? 2.When used with Ethernet as the underlying medium,again an accuracy of 230ns seems far-fetched due to the delay introduced by the random nature of the CSMA/CD protocol.[ (2^k -1)*51.2 us for 10 Mbps Ethernet] | ||
05-26-2006
10:58 AM
- last edited on
12-01-2025
07:01 PM
by
Content Cleaner
Those are good questions. The PCI-1588 boards uses a very precise 10MHz (1.5 ppm) TCXO oscillator to start with to minimize drift between synchronization updates. The board then uses the 1588 protocol to perform the synchronization updates and adjust the 1588 time to ensure that the slave clocks do not drift from the master clock over time.
When the 1588 devices are added to the network they will communicate with the other 1588 devices to determine which device is the best master and the rest of the 1588 devices will become slaves.
The 1588 protocol takes care of accounting for network latencies by measuring the time it takes to send packets between the master and the slaves. This of course will work very well on networks that have minimal jitter. Straight cables as well as hubs have the best performance and least amount of jitter. Devices such as switch will add additional jitter to the system, because of there non-deterministic behavior. There are switch (transparent switches) that are specifically designed for 1588 enabled networks that can also be used to minimize the jitter.
For more information here is a good document that may provide more information.
Introduction to Distributed Clock Synchronization and the IEEE 1588 Precision Time Protocol
-Josh
05-26-2006 11:15 AM
05-29-2006 11:40 AM
05-30-2006
08:19 AM
- last edited on
12-01-2025
07:02 PM
by
Content Cleaner
05-30-2006 09:51 AM
05-30-2006 10:19 AM
05-30-2006 10:50 AM