SRQ signal

[Firmware_programmer]

Hi
I write a firmware for a GPIB device (us use a TNT4882 gpib asic. The deevice is an arbitrary waveform generator). For download wave information to the device we are using DMA of the ASIC.When the firmware finish to receive the data and update its output I assert the srq line. When application work in loop after number of loop the application don't "receive" the srq and exit with timeout. When I monitor the srq line I see that when the application "crash" the srq line stay to "0" level and my firmware not hang up(it finished to receive the data and wait for new command).
My question is : who must up the srq line?( if NIspy work the application crash more than without NIspy). Is it possible that is a hardware problem?
Thanks

Dina

[GPIB_Guru]

I am not 100% sure that I understand you problem, but let me answer what I think the problem is. It seems as if you are creating a GPIB instrument based on the TNT4882 GPIB ASIC. You are trying to assert the SRQ line on the GPIB. When you program the TNT to assert the SRQ, you are not seeing the SRQ line asserted on the bus.

How are you asserting the SRQ (what registers are your writing)? There are three ways to assert the SRQ line on the TNT.
1) Using 488.1 style
2) Using 488.2 style with STBO IE interrupt
3) Using 488.2 style without the STBO IE interrupt

Information about the three different types are described in the TNT4882 reference manual on page 4-13.

[Firmware_programmer]

Thanks for your response!
I work with the third method.My problem is when application sending to my firmware DMA in loop after numbers of loop (the number is random) the SRQ line stay to low level and the application no success to "read" the event and go out with error (time out). I want to understand who must up the line? (my ASIC or the CIC?) and perhaps what is the cause of the problem maybe hardware?


Thanks