Setup of NAT7210 chip in embedded application

[Big Joe]

I am using a NAT7210 chip in a board that uses an ATMEL 8515 micro. I want the board to be strictly a target GPIB device (not a controller). It has to receive commands (such as *IDN, as well as other commands) and then respond to those commands by sending data.

I assume that this means that the 7210 has to be a listner and a talker when commanded to do so by the controller.

What is the proper initialization to have the chip come up as a listner (I would guess) first so that it can recognize the commands, and then switch over to a talker to respond to the commands? And then back again to a listener. I am guessing that this is how it must work.

I think the board has to be at a particular address as well, since eventaully it will be on a GPIB bus with other instruments (power supplies, scopes, etc.).

Also, I am running NI488.2 software on a PC to try to recognize the GPIB board ("Scan for Instruments"), but it always indicates that no instruments are found. What does NI488.2 software do to detect an instrument?

Thanks.

[GPIB_Guru]

Chapter 5 of the NAT7210 manual has information about how to initialize the chip for communication. Appendex B has a good introduction to GPIB to help make sense of the initialization information.

You can get the manual at:
http://digital.ni.com/manuals.nsf/websearch/36E3DF121E92D54E86256DB10046D7DB?opendocument

There is also a good page that collates all of the register-level programming manuals and application notes at:
http://www.ni.com/support/gpib/reg_prog.htm

If, after reading the documentation and webpage, you still have questions, please post them.

Good luck!

[ray1234]

Hi,

I'm also having problems getting the NAT7210 chip to work.

I'm using general purpose output lines from a microcontroller directly talk to the chip, but
I can't seem to write/read from its registers properly.

I used AVRGCC to write some short functions for reading and writing bytes to the chip

IE: my write procedure looks like

write address to addresslines (RS2-0)
assert CS pin
assert WR pin
write data to data bus
release WR pin
release CS pin


and my read procedure:

write address to addresslines (RS2-0)
assert CS pin
assert RD pin
read data from bus
release RD pin
release CS pin

I tried reading the version number of chip by first writing 0x50 to the AUXMR(+5) register (for page-in) and then reading the
VSR(+3) register but this doesn't work.

btw, I also have the reset pin pulled high to place the chip 7210 mode.

[Collin M]

A couple comments for ray1234,

The CS, WR, and RD pins are active low. When you assert them you should be driving them low.

The reset pin should be high when you want to access the 7210, but it should be driven low at some point to initialize the chip. It should be driven low while the power rail is stable to proper initialize the chip.

To avoid the complexity of the page-in registers, can you try reading the ADSR immediately following reset unassertion? This register should be 0x40 following a reset.

Also, are you observing the proper wait time from CS and RD asserted to valid data from the 7210?

[ray1234]

hi dittohead,

i tried reading the ADSR register after initialization and got 0x40,

whats the next step that I should take, is there a way to test whether I can write correctly? or should I just follow the chip initialization sequence given in the manual?

thanks so much.

[Collin M]

Try writing to and reading from the ADR. First read ADR0 at offset 6. It should be 0 following a reset. Next, write 1 to the ADR, then read ADR0 again. You should read 1. If this works it appears that you can read from and write to the 7210. From there you can implement the chip initialization sequence given in the manual.

[ray1234]

The writing doesn't seem to work,

I read ADR0(address 6) and it was 0 to begin with, then tried to write 0x01 to ADR(same address) and then it still reads 0 after reading it back.

I am even tried putting extra delay times between asserting WR and CS and unasserting them

btw my clock is a pulse from a crystal at 10MHZ and i haveed the DACK pin connected to +5V and DRQ unconnected, i dont know if any of that makes a difference.

thanks

[Collin M]

How long is the combination of CS and WR asserted? Do you have enough data and address setup time relative to CS and WR? The 7210 should latch data into a register whenever either CS or WR unasserts.

Have you looked at the signals with a logic analyzer? If you don't have a logic analyzer can you step through the code running on the processor with an in-circuit debugger and look at the signals to the 7210 with a voltmeter? There is no maximum time for a 7210 register access (WR/RD/CS can be asserted for an arbitrary time). It would be good to verify that WR is asserting when you think it should.

The only things that I can think of that may cause reads to work while writes do not work are the following:
-Reset is asserted (I think reads will work when reset is asserted)
-WR not asserted when CS is asserted
-Combination of WR and CS assertions too short
-Data not setup prior to WR or CS unasserting

If none of this works let me know.

[ray1234]

thanks for the help,
I had reset pin high and now the writing seems to work.

In addition to reading and writing to the ADR registers I tried reading the version number and got 0x84, which seems right. But the wierd thing is that after i setup the initialization sequence, (assert PON... Clear PON) I get 0s when i read try to read the version number again.

And i also tried to detect active listeners by reading the BCR registers but also get 0.

btw, I have the hardware configuration connected to a tektronix TDS3054 scope, what's the first thing I should do to initialize some kind of communication with it?

Do you know where I can find perhaps some sample code for this kind of applications?

thanks again for your help.

[Collin M]

In order to read the state of the GPIB signals through the BSR, the external GPIB transceivers must be in the correct configuration. The direction of the GPIB signals between the GPIB transceivers and the 7210 is set by the state of the 7210. For example, if you want to read the state of the NDAC signal on the bus, the 7210 must be in a state where NDAC is an input not an output. NDAC is an input when the 7210 is a talker or CIC.

I'm not sure why you read 0 the second time you read the version register. Are you able to duplicate that?

The 7210 manual (http://www.ni.com/pdf/manuals/370875a.pdf) gives some information and some high-level instructions for getting started. You could start with the Controller Software Considerations chapter. At a high-level you will address the 3054 and 7210 to talk/listen using command bytes, then use 3054-specific commands to communicate with it. The 3054-specific commands must be data bytes, not command bytes, meaning the 7210 will be a standby controller when it sends them. Again, the manual has more specific instructions for this.