Drive a host timed loop with LabVIEW FPGA IRQ

[StephenB]

It sure would be nice to take advantage of timed loops when your FPGA is dictating the timing of your host code with IRQs. DAQ and XNET can make timing sources to drive the timed loop, why not LV FPGA?

I'm imagining a "Create timing source from IRQ #" VI. # input and string output along with the reference wires.

[dwisti]

I like this idea.  I currently implement this type of code with but its quite messy and complicated. This idea would greatly simplify my code. IRQ priority would be important in this timing source.  If I have more than one IRQ, higher priority interrupts must not be blocked by lower priority ones.

[StephenB]

Well the timed loop only supports one timing source. So you'd have to have one timed loop per interrupt. Unless....
http://forums.ni.com/t5/LabVIEW-Real-Time-Idea-Exchange/Drive-a-timed-loop-with-multiple-timing-sour...

[tom_ifms]

Very good suggestion. Me too I've been missing the possibility of beeing able to choose a clock in my host timed loop, that is synchronous to a fpga clock. However I'm not sure if IRQ is the right choice, since you cannot send IRQs from a timed loop on the fpga.

[Intaris]

I'd personally love to be able to define a DMA channel as the actual timing source for a timed loop.  We have a process running on FPGA which outputs a defined data packet every N cycles and we have to jump thorugh hoops to unite the timing characteristics of the FPGA and RT systems.  It would great to be able to define the loop to trigger whenever the DMA has N items in it.

Of course we could change code slightly to incorporate IRQs so even this is a great idea.

[StephenB]

Intaris,

If we could write to system memory directly from FPGA by address, and then read it in RT code by address... with a shared time domain so you could run full featured timed loops in FPGA... that would do what you need. Here is part of that idea (see my comment there too): http://forums.ni.com/t5/LabVIEW-Idea-Exchange/Shared-memory-between-RT-and-FPGA/idc-p/2527654#M24261

[Intaris]

I have doubts about the implementation of the other idea though....