Array of Global variables

[tintin_99]

Hi , I have global variables that give me reference to Target FPGAs

In one VI I have to perform the same operations on all the targets.I thought I can enable Loop Iteration Parallelism instead of copy and pasting the loop 4 times. But I realized I can't have array of global variables - FPGA references in this case. Could you please help me on this. How can I minimize copy and pasting to implement this? 

This is the VI before adding parallelism just for 1 FPGA ref and the next picture is after adding parallelism  but as you csan see I csan't make array of globals

[crossrulz]

You will need to play with the Dynamic FPGA Interface Cast.  You have to strip out only the common things specific for this FOR loop in the FPGA Interface, cast all of your references to that interface, then use the Build Array.  From there you can use the parallel FOR loop.

[tintin_99]

Thanks crossrulz

Could you please explain it in more details. My FPGA references are not dynamic. I choose VI Target in the configuration.

Can you show with 1 example how can I case the VIs to be able to make an array of the references

Thanks

[crossrulz]

I know your references are not dynamic.  But if they have common parts to their interface, you can use that function to cast them into a reference that just has that common interface.  Since there is a lot of configuring of the reference, it is really hard to make an example.  But create a reference from the "type" include and right-click on it and choose "Configure FPGA Reference".  Import from one of your bit files and then remove the parts that are not common across all of your FPGAs.

[David-A]

The help topic you'll want to review is Using Dynamic FPGA Interface References. When you have a reference to an FPGA, that reference has a 'type' that is defined by all the top level controls/indicators, fifos, and methods exposed by the FPGA VI or bitfile. You can't build an array of dissimilar FPGA references, because an array requires that all items in the array have identical properties. 

[David-A]

duplicate post

[tintin_99]

Thanks David,

The problem is I would like to use paralleslim inside the loop and I can't cast it to a specific FPGA VI in each itearion. Is there any solution for that?

[David-A]

Using parallellzied for loops only improve run-time performance if you are working with large arrays that have a significant amount of processing associated with each element, and those elements can be processed in any order. I'm not sure that any of those are true for this case.

If you are performing the same operation on each target then the controls on both FPGA VIs should have the same name so that you can use the same interface. If you need a different interface for each FPGA target, then you need bundle the FPGA reference up in a cluster and include information that tells the application downstream which interface to use. Here's an example:

[Hooovahh]

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@David-A wrote:

Using parallellzied for loops only improve run-time performance if you are working with large arrays that have a significant amount of processing associated with each element, and those elements can be processed in any order. I'm not sure that any of those are true for this case. 

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This is not necessarily true.  Lets say I have a Wait 1000ms in a for loop that runs 4 times.  Normally this takes 4 seconds, but if I turn on parallelism it only takes roughly one second.  Parallelism isn't just for large arrays, it is also for performing multiple operations in parallel, when sequentially it may take a long time to finish.  I use it all the time when I want to take two finite analog measurements on two devices at once.  Here two separate tasks can be performed at the same time.

Sure for this case do both FPGA targets need to be commanded at the same time, or one slightly after each other?  Probably doesn't really matter.