07-19-2005 08:54 AM
07-19-2005 09:18 AM
I will say that for a number of years there have been commercial board testers, analog, digital and mixed, that have had LabVIEW as the underlying code. As they are marketing their testers they haven't necessarily made the fact of the code being written in LabVIEW (as it wasn't user modifiable if I recall) a part of their marketing, but they chose LabVIEW. These were well entrenched test system manufacturers. As to monitoring the individual status of internal test points, there are some technical issues to deal with that become significant if you are doing much more that static testing. If you are trying to watch anything other than fairly slow logic state changes (vs. transistions, edges, etc.) it becomes interesting in designing the hardware. With moderate logic speeds ( a few MHz or more) your test probe can introduce "reflections", caused by impedance mismatches, that can actually cause false triggering if you are looking at internal (non-buffered) logic nodes. If you are only interested in essentially static logic levels ( is point A a high, B a low, C a low, etc.) then it is just a matter of having a table of "test vectors" that represent the stimulus levels and the expected resulting levels. Describe what you are trying to do with a little more detail and we can possibly give you more guidance. (That isn't the "Royal We" or the editorial We either, it just represents that there are a lot of other really knowledgeable people "listening" on this forum!
)
P.M.

07-23-2005 09:34 PM
This isn't exctly what you are looking for (but might be pretty close), but the company I'm working with now uses HS-DIO to exercise the clock and serial data inputs of inkjet printheads. In addition to jetting the 'heads, we also read out data serially.
Mike...