CHANGE cRIO-PB node @ RUNTIME

[Pipeolo77]

Hi all,

I'm having trouble trying to change the profibus node number of a cRIO-PB comsoft module.

In particular I have to distribute the same FPGA application on different cRIO and only thing that changes is the profibus node.

So I create an ini file from where I read the node number and through a read/write method I pass it to FPGA during startup but It doens't work.

I tried to contact comsoft guys but I received this answer:

Any suggestions?

Regards

Paolo.

[AndreaN]

Hello Paolo,

I didn't understand clearly the situation...

The code you posted is the solution from Comsoft? The one with the green frame is the correct solution?

You tried it and it doesn't work?

Give me some more informations so I can have a better view of the situation.

Ciao,

Andrea 

[Pipeolo77]

Hello Andrea,

I try to explain it better.

First of all:

RED code is REAL TIME target code where you can see I open the FPGA reference and pass to the FPGA through the write method the address value during an initialization step.

GREEN code is FPGA target where you can see the address parameter written to the profibus initialization VI.

Normally, as I experienced, the FPGA side is compiled with address value as a costant but in my case, to avoid multiple bitfile, I tried to pass address value as parameter with the method I post.

It doesn't work. When I check node number presence from profibus master, the node number is the original which the FPGA has been copiled with even if I specify a different one.

In my opinion there is something like missed sync between FPGA startup and address parameter notification to the FPGA so that profibus initilization vi on FPGA starts before the address notification from Real Time Target to FPGA.

Hope to be more clear now.

Best Regards

Paolo.

[Pipeolo77]

About " I tried to contact comsoft guys but I received this answer"

please it's a my mistake... read it as "I tried to contact comsoft guys but I received NO answer".

They told me they cannot support code written for data exchange from Real Time target to FPGA even if this code is related to the profibus module.

So RED is my production and GREEN is my modification of comfsot example.

Best Regards

Paolo

[AndreaN]

Ok, now it's more clear.

It is very strange because from the screenshot the code looks allright.

Also the FPGA VI follows the Data Flow ruel, so the first subVI cRIO Init PB cannot start before the address is passed to it.

Could you simplify the code and post it in order to take a look? 

Ciao, 

[Pipeolo77]

Hello Andrea,

I attach a simplified version of realtime app and fpga app.

Hope this will help you to find what's going on.

Regards

Paolo.

[AndreaN]

Ciao Paolo,

I'm sorry for the late reply, but I've been out of office in the last days...

I've taken a look at the code you sent me and i created a simple example that solved the problem.

I'm attaching the screenshots of the FPGA vi and the RT vi.

Basically I've added a while loop before reading the address, in order to add some delay and I had this two results:

1. If I write the address control and then run the FPGA VI the while loop executes one iteration and the address i written/ read correctly
2. If I run the FPGA VI and then write the control the while loop executes 100 iterations (2.5 microseconds), and the address is written/ read correctly

Try to modify the FPGA code like I did and let me know if it works.

In the RT VI I've put a wait of 2000 ms just to be sure to wait for the FPGA VI to execute the node "unbundle->address 2".

Hope this helps.

Ciao,

Andrea 

[Pipeolo77]

Hello Andrea,

sorry for late reply but I've been very busy.

Just today I tried to do what you suggested me but without success.

There is a strange issue I can't explain:

as you did in the example, I tried to read back the address value before close the FPGA reference and I was able to read the correct value I set up in the init section.

So, address value is correctly written but also in this case the Profibus module start showing FAULT led on.

Best Regards

Paolo.

[AndreaN]

Ciao Paolo,

so basically the address you write is correct but the module is on FAULT...

I guess there's something wrong with the PB Init function but there's no way to debug the FPGA VI...The only thing I can think of is to copy the code of that function in your VI in order to verify what's going on in that function.

Let me know how it goes.

Ciao,

Andrea