Can I transfer data through FIFO in two different myRIO FPGA Targets?

[AhmadHassan]

Hi GerdW,

How to implement PLL and what and how should I track with it? As I have told you that there are 16 digital output pins which are required for a single phase and are provided through the second myRIO. PLL will be implemented between two myRIOs and what the PLL will be doing there?

Regards,
Ahmad

[GerdW]

Hi Ahmad,

you said the 2nd myRIO should output a pulse with 240° phase to the 1st myRIO: so you could monitor the first pulse of your 1st myRIO (and its frequency) to adjust the 2nd myRIO to output it's first pulse at (more or less) exactly 240° phase…

That's what a PLL is doing according to the description at Wikipedia!