Can't seem to measure above 1k S/s, please help

[TomSegal]

Hello everyone I have an "NI PCIe-7852R RIO0" FPGA card. The card can supposedly communicate at 750k signals per second, however in practice when using Labview read data from the FPGA I can't seem to get above 1k signals per second. I tried many example VIs, I tried using all 3 timing engines accessible via the FPGA wizard, I tried changing the values of the loop timers in the VIs that I was using, but still despite my attempts, when saving data to a file, it only saves at up to 1k signals per second. How do I increase the rate? Any pointers in the right direction would be greatly appreciated as I am pretty desperate by now. THANKS in advance, Tom.

[Norbert_B]

Is it possible that you are working with the SCAN ENGINE all the time?

Did you check the settings for the loop rate there?

Norbert

[TomSegal]

Thanks for the quick reply. By scan mode you refer to one of the 2 virtual modes of the FPGA in which no compliation is required upon modifications to the FPGA VI right? In that case I'd say that I'm using the third, real mode, because whenever I change the FPGA VI I need to recompile it. For this reason I only work with the HOST VI.

[Norbert_B]

If you are creating a VI for the FPGA (which requires a compilation for the FPGA creating a "bitfile"), you have to implement the timing there.

Using the Wizard, you can select different timing engines.

When selecting "Single Point Continuous", you should read the following hint in the Wizard:

For example, if you have a device with a maximum update rate of 400 ms, then all the items in the same timing engine are limited to an update rate of 2.5 Hz.

When selecting "Single Point Timed I/O", the maximum rate is depending on the bus you are using to transfer the data from the FPGA device to the host. On my system, it is limites to 70kHz.

When selecting "Buffered DMA", i can go up to above 500kHz.

hope this helps,

Norbert

[TomSegal]

Hello and thanks again

It seems like I'm limited to 70k unless I'm using the DMA timing engine.

However I can't get the DMA timing engine to read data and save it to a file at the required rate. If I pick a rate which is too high (either scanning rate or buffer rate) I get overflow or underflow error and it stops the program.

My VI is supposedly very light, all it does is save the data to a specified file. What am I doing wrong?

[Norbert_B]

It depends which buffer is overflowing.

I assume that you are not saving the data on the host fast enough. So you fetch the data too slow from the DMA which results in an overflow for the DMA transfer buffer.

You should post your project for further analysis.

Or you search ni.com for examples/reference architectures for continuous data streaming with FPGA.

hope this helps,

Norbert

[TomSegal]

Thanks.

I tried experimenting with different values for the scan rate / loop rate and I also tried working with several examples, but I always get either buffer overflow or underflow within less than a second of starting the program and then the measurement stops.

I attached my program here. In the host VI, The upper timing engine is the DMA, it is supposed to read the data into a file at 750k S/s.

The lower timing engine is a continous point timing engine which is supposed to send output for a certain amount of time and then stop. This timing engine works correctly, my problem is with the top one.

Thanks again 🙂

[Norbert_B]

I don't see how deep your transfer buffer for DMA is configured. But i would say that it is limited (otherwise, you could "blow" the FPGA), hence it will have a capacity of way less than a second.

Looking into the loop "Data Acquisition", you have some calculations and a "write to measurement file". I expect this to run slower than you buffer will run out of capacity.

You should use a producer/consumer on the host to introduce additional buffering.

Norbert

[TomSegal]

Isn't consumer/producer a general term for input/output? Or are you referring to specific VI components?

Do you maybe mean that I should place the "write to file" inside of a loop with a loop timer or something similar?

Thanks for looking into my file and for your continued assistance.

[Norbert_B]

Producer/Consumer is a "design pattern". You can examin its implementation by using the Template Browser (File >> New).

The reading of the DMA is the producer, the write to file would be the consumer.

You should also look into "file streaming" since you can improve performance in your application.

hope this helps,

Norbert