Can we have a global variable between RT VI , FPGA VI and MY computer VI

[prashiit]

In a project, VIs are in different levels........... one is under My computer, one is under RT Target and one is under FPGA Target.

Can we have a global variable among these VIs...........................

Thanks

Prashanth 

[Norbert_B]

Prashanth,

no, you cannot share global variables among those targets. You have to use dedicated transfermechanisms like DMA-FIFO (FPGA to Host, Host to FPGA), Shared Variables (RT and Windows) or other TCP/UDP based protocols (e.g. the STM).

hope this helps,

Norbert 

[prashiit]

Hii..

     Thanks for your reply..

     I am working on Image processing applications. I tried to process the image on FPGA. Since, FPGA does not support vision utility functions, I used them in RT host VI. This RT host VI reads the image using IMAQ read vision utility function and then this data is converted to 2D array and to 1D array. Now, using DMA FIFOs, I tranferred this data to FPGA VI.

     But, problem is RT is also not supporting IMAQ read vision utility because there is no installer available for vision utilities.

So, I want to use these IMAQ read function in "My computer VI". In this VI, I convert the data into 2d array and then to 1d array.

Now, I send this 1D array to RT host. RT host VI will send the same data to FPGA VI through DMA FIFOs. FPGA do some process and gives some output. This output is given to RT host VI through DMA FIFO. Now, RT host VI will send the data to "My computer VI"..............

This is the way I want to approach to do image processing on FPGA. it is possible for smaller number of elements. If the image is very large say 256*256.

Then I have to use loops for sending 256 elements at a time (256 iterations). 

But, how it is possible to achieve synchronization between three VIs for each iteration.................????????

Is there any alternative way........?

Please respond...

Thanks

Prashanth 

[prashiit]

Actually, I am working on cRIO - 9074 RT target.........