Clarification with I2C addressing

[rholz]

Hello everyone,

I have been struggling understanding addressing for I2C and the NI-845x API. The standard addressing is 7 bits and then the additional LSB being the R/W bit. 7 bits of addressing would allow for 128 unique addresses to be defined on a single I2C bus. Reading this documentation from NI does not support this idea. In the section under "Device Addressing" it states: 

A control byte is the first byte received following the Start condition from the master device. The control byte consists of a 4-bit control code, typically set as ‘1010’ binary for read and write operations. The next three bits of the control byte are the Chip Select bits (A2, A1 and A0).

The Chip Select bits allow the use of up to eight devices on the same bus and are used to select which device is accessed. The Chip Select bits in the control byte must correspond to the logic levels on the corresponding A2, A1 and A0 pins for the device to respond. These bits are in effect the three Most Significant bits of the word address.

I am confused, because in no other documentation have I read about this control code. All other documentation I have read including the datasheet for the LCD I will be using says that it supports any 7 bit address. Hence allowing for the 128 devices on a bus versus only using the 3 chip select bits in the NI documentation. Which would restrict me to 8 unique devices per bus. So some clarification if using NI-845x would for some reason restrict me, in the instance of using 7 bit addressing and limit me with only 8 devices per I2C bus.

Thanks in advance for your answers!

[crossrulz · Accepted solution]

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@rholz wrote:

I have been struggling understanding addressing for I2C and the NI-845x API. The standard addressing is 7 bits and then the additional LSB being the R/W bit. 7 bits of addressing would allow for 128 unique addresses to be defined on a single I2C bus. Reading this documentation from NI does not support this idea. In the section under "Device Addressing" it states: 

A control byte is the first byte received following the Start condition from the master device. The control byte consists of a 4-bit control code, typically set as ‘1010’ binary for read and write operations. The next three bits of the control byte are the Chip Select bits (A2, A1 and A0).

The Chip Select bits allow the use of up to eight devices on the same bus and are used to select which device is accessed. The Chip Select bits in the control byte must correspond to the logic levels on the corresponding A2, A1 and A0 pins for the device to respond. These bits are in effect the three Most Significant bits of the word address.

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That documentation is wrong.  It almost reads like it is mixing the SPI and I2C concepts.  Or it was written for a specific I2C device.  The control word is [A6..A0,R/W].  But you just need to define the address (A6..A0) in the driver.

[rholz]

Thank you crossrulz

That is great news knowing I will not have any issues with addressing, it is annoying however I spent time trying to solve an issue that does not exist.

Thanks for the clarification.