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Creating a 100ns pulse with FPGA

Hi,
 
I was wondering if I can output 100ns pulses with my PXI- 7833R. I need to output a pulse upoon the rising edge of another signal and the pulse width need to be about 100 ~150ns. Do anyone know how can it be done?
 
Thanks.
 
Regards,
Fw
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With the 7833R, this should be rather straight forward. For example, you
could wait on the rising edge of a digital input before proceeding to a
single-cycle timed loop (SCTL). At 40 MHz, the SCTL will have 25 ns
resolution. You can set a digital output high for 4 to 6 cycles.

> I was wondering if I can output 100ns pulses with my PXI- 7833R. I need
> to output a pulse upoon the rising edge of another signal and
> the pulse width need to be about 100 ~150ns. Do anyone know how can it be
> done?


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Fw

 

Here is one way to generate a pulse.  This will generate an edge, delay 100nS, generate the opposite edge.

 

 

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CLA

LabVIEW, LabVIEW FPGA
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