DAQ PCIe-6361 Sample Clock Timig Error

[Eckman]

I'm trying to sample a signal at different frequencies, but so far have only been able to use one 208.3kHz. When I double the frequency of my signal I get an error from LV (-200019). I read that if this error occurs that my rate to to low and so not enough memeory is being allocated to the buffer and to fix it I must increase my rate to the maximum expected rate of my signal. But as you can see from the sample vi I attached, not only am I already at the max sampling rate 2MHz, but my signal is at a much lower frequency. Does anyone have any idea what I need to do to read higher frequency signals?

Thanks,

Elliot

[Norbert_B]

Elliot,

i do not understand your issue, but from looking into your code, you are using an external clock connected to PFI3.

Why do you use an additional property node to set the timbase clock frequency?

My suspicion is that the property node and external clock do not fit together, so try removing that property node.

As a second note: Are you sure that your external clock signal is a good shaped TTL signal? I find it possible that noise on the clock signal does succeed the maximum sample rate for the device.

hope this helps,

Norbert

PS: Please post questions of that kind in the DAQ forums in the future. Thanks!