12-28-2008 05:01 PM - edited 12-28-2008 05:10 PM
Hello,
I recently reviewed the DDS example. Looks good and I will be able to use it. However, I think there is a problem with the reset accumulator code. The reset acts on the next value of the accumulator and will therefore produce the current point using the previous value of the accumulator. I have attached a suggested change. The timing changes considering that the data flow changes slightly.
correctled files
12-28-2008 05:07 PM - edited 12-28-2008 05:11 PM
sorry the VI FPGA DDS Generation Sine 1-ch v1.vi (44 KB) file is not the one I meant to post. updated file refs in original post
Stu