DTR state while port init

[Dennis_Knutson]

What exactly do you need besides the picture tbob posted?

[bimbim]

Hi,

To put the DTR line to high or low, just see the picture in previous replies. The DTR state must be put to asserted or unasserted, just check the one corresponding to high or low.

Hope it helps.

Bim

[Lev]

Hi,

Thanks for your reply.

The picture is really helpful and I have already made good progress on seting the DTR bit high and low.

I have another question to ask:

The DTR bit is set low before sending the data to write buffer. After sending the data to the write buffer, a time delay of about 15 microseconds is needed before the DTR bit is set back to high for read.

How can I generate a time delay in microseconds between write and read cycles. I tried the Time Delay VI. But  it generates time delays in 1 millisecond increments.

Thanks for your help.

Lev